Bias and precharging circuit for use in reading EPROM cells
US5226013A · kind A · utility
2Cited by
2References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1991 |
| Grant date | Jul 6, 1993 |
| Priority date | — |
| Expiry date | Oct 8, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The bias and precharging circuit comprises a bias part and a precharging part of the bit line together with a sensing amplifier operating by comparison of the voltage of the bit line and a dummy bit line. The precharging part includes components which turn off the bias and precharging parts as soon as the sensing amplifier has read the cell subjected to precharging. The bias part includes components for amplifying the voltage unbalance produced by bias between the bit line and the dummy bit line. It provides a current-mirror to cause said voltage unbalance independently of the precharging part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.