Low power pseudo-static ROM
US5226014A · kind A · utility
43Cited by
16References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 24, 1990 |
| Grant date | Jul 6, 1993 |
| Priority date | — |
| Expiry date | Dec 24, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pseudo-static ROM circuit which uses cross-coupled sense amplifiers to provide rapid accesses to ROM stored data, yet because of a special bit line precharger and dummy load arrangement dissipates very little static power. After a stable logic static is attained by the sense amplifier during a READ, the sense amplifier and the precharger-dummy load circuits do not draw any appreciable current or power until the next precharge-and-READ operation is initiated. Therefore, almost all of the power dissipated by the pseudo-static ROM occurs during the dynamic operations of precharging and READing the bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.