Data timing recovery apparatus and method
US5228064A · kind A · utility
27Cited by
7References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1989 |
| Grant date | Jul 13, 1993 |
| Priority date | — |
| Expiry date | Dec 22, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/044
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Received data information is converted into digital data by sampling the data information and making a determination of the digital state for each bit. It is important that the clock which controls the time at which each data decision is made occurs at an optimal time, i.e. at the maximum signal to noise ratio of the received data information. This invention provides an improved clock control apparatus in which the clock timing is updated only upon receipt of one of a predetermined set of data sequences to enhance optimal timing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.