Semiconductor integrated circuit device with test mode for testing CPU using external signal
US5228139A · kind A · utility
23Cited by
8References
22Claims
0Family size
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Key dates
| Filing date | Feb 21, 1992 |
| Grant date | Jul 13, 1993 |
| Priority date | — |
| Expiry date | Feb 21, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318505
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.