Buffered nondestructive-readout Josephson memory cell with three gates
US5229962A · kind A · utility
Inventors
Key dates
| Filing date | Jun 13, 1991 |
| Grant date | Jul 20, 1993 |
| Priority date | — |
| Expiry date | Jun 13, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/44
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffered nondestructive-readout Josephson memory cell comprises only three gates and is free of the half-select problem associated with Josephson memories, for both write and read operations. The basic memory cell unit comprises a first interferometer gate and an associated inductor defining a memory storage loop and a second interferometer gate that, together with a second inductor, defines a second loop in which a current pulse can be established only when a circulating current exists in the first loop. A third gate, responsive to a sense line and to the current pulse in the second loop, provides a voltage output which changes based upon whether a "1" or a "0" has been stored in the storage loop. For fabricating a bit-accessible memory, the third gate is further connected in closed circuit relationship with a third inductor which is magnetically coupled with the first gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.