Patent · US Expired

Programmable timing circuit for integrated circuit device with test access port

US5231314A · kind A · utility

31Cited by
8References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 2, 1992
Grant dateJul 27, 1993
Priority date
Expiry dateMar 2, 2012

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K7/08
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A programmable and controllable timing circuit (CTC) is formed on an integrated circuit chip (IC) having a test access port (TAP) with TAP access pins including a TAP data input (TDI) pin, a TAP data output (TDO) pin, a TAP mode select (TMS) pin, and a TAP clock (TCK) pin. The test access port includes a plurality of TAP data registers (TDRs) coupled to receive data signals at the TDI pin and to shift data signals to the TDO pin. A TAP instruction register (TIR) is coupled to receive instruction codes at the TDI pin and to direct use of selected TDRs. A TAP controller is coupled to receive control signals at the TMS pin and clock signals at the TCK pin and provide control and clock signals for controlling operation of the TIR and TDRs. The TAP is provided with a controllable timing circuit design specific TAP data register (CTC/DS/TDR) constructed for receiving a coded CTC digital timing code at the TDI pin. A variable timing generator circuit on the IC is responsive to a CTC digital timing code for generating a selected time interval between a start trigger signal (STS) and a clock strobe signal (STB) according to the specified CTC digital timing code. The CTC/DS/TDR is coupled to…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.