Fault tolerant RLL data sector address mark decoder
US5231545A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 4, 1991 |
| Grant date | Jul 27, 1993 |
| Priority date | — |
| Expiry date | Jun 4, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/20
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for decoding a unique data sequence forming an address mark within a stream of RLL coded data values in order to start a byte clock for synchronizing operations within a data sequencer of a data storage system. The unique data sequence nominally comprises at least two adjacent sequences of zeros of a maximum permitted length occurring between three flux transitions under a predetermined RLL data code. This new method comprises the steps of: detecting a first flux transition, detecting a second flux transition, determining the number of zeros of a first zero sequence from the first flux transition to the second flux transitions, determining if the accumulated number of zeros of the first zero sequence is equal to the maximum permitted length, plus or minus one zero, and if so, detecting the third flux transition, determining the number of zeros of a second zero sequence from the second flux transition to a third flux transition, summing the numbers of zeros of the first and second sequences, determining if the sum is of the maximum permitted length, plus or minus one zero, and if so, starting the byte clock in relation to the determined first and second sequence…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.