Semiconductor memory device
US5231607A · kind A · utility
30Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 1990 |
| Grant date | Jul 27, 1993 |
| Priority date | — |
| Expiry date | Oct 19, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has a memory cell array region, a plurality of signal lines arranged above the memory cell array region, and a plurality of power-supply lines or grounding lines, each of which has a first end and a second end and which are arranged between the signal lines in a similar pattern to that of the signal lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.