Ring latency timer
US5235593A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1992 |
| Grant date | Aug 10, 1993 |
| Priority date | — |
| Expiry date | Sep 14, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/433
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A ring latency timer provides a station attached to a token ring network with the capability of obtaining an accurate latency measurement of the ring to which it is attached. An internal hardware register, which may be read via the processor control bus interface, contains the latest ring latency measurement. A latency interrupt bit, when cleared, enables the latency measurement function. A subsequent interrupt which causes the latency interrupt bit to be set by the chip signals the completion of the latency measurement and the function is once again disabled. The latency register holds the latency information until the interrupt bit is cleared by the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.