Optimal integrated circuit generation
US5237513A · kind A · utility
22Cited by
8References
8Claims
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Assignee
Inventor
Key dates
| Filing date | Apr 18, 1990 |
| Grant date | Aug 17, 1993 |
| Priority date | — |
| Expiry date | Apr 18, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure is generated to perform a given combinational logic function. A data processing system generates the integrated circuit structure when provided with an input specification of the function to be performed by the structure. The resulting integrated circuit structure is comprised of both restoring logic networks and pass logic networks. The structure is generated by initially representing the function in a number of multidimensional boolean spaces. Subsequently, these spaces are manipulated to generate the resulting pass and restoring logic networks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.