Barrier metal contact architecture
US5238872A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 2, 1992 |
| Grant date | Aug 24, 1993 |
| Priority date | — |
| Expiry date | Oct 2, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76843
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The interconnect system of the present invention is comprised of a TiW metal barrier layer as well as a Ti metal barrier layer deposited on the silicon surface. An anisotropic etch process for the Ti/TiW/Al metal sandwich has also been developed without corrosion and metal residue. The addition of the Ti layer between the TiW layer and the silicon surface reduces the contact resistance between the metal and P.sup.+ silicon contact. This Ti layer also effectively improves the blocking of aluminum migration to the silicon surface through TiW grain boundaries. In order to realize good ohmic metal-P.sup.+ contacts, the surface concentration of the silicon should be very high. Therefore, the present invention also employs a plasma mode etch which removes about 250 .ANG. silicon since peak concentrations of P.sup.+ dopants (boron) are often found about 400 .ANG. below the silicon surface. This plasma mode etch will also remove silicon damage caused by previous etching. A detailed etching process is also developed in the present invention so as to avoid any corrosion or metal residue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.