Semiconductor device having increased electrostatic breakdown voltage
US5239194A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1991 |
| Grant date | Aug 24, 1993 |
| Priority date | — |
| Expiry date | Feb 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
A semiconductor substrate has a plurality of MOS transistors formed therein. Each of the transistors comprises high density diffusion regions having high impurity density and serving as source and drain, low density diffusion regions having low impurity density and extending in contact with the high density diffusion regions, respectively, a channel region formed between the low density diffusion regions, and a gate formed above the substrate and insulated from the channel region. One of the transistors has its drain connected to an input/output terminal. The low density diffusion region of the one has impurity density higher than that of the other. The channel length of the one is greater than that of the other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.