Shared bus arbitration apparatus having a deaf node
US5239630A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1990 |
| Grant date | Aug 24, 1993 |
| Priority date | — |
| Expiry date | Jul 2, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/368
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved arbitration technique for a computer network system in which multiple nodes communicate using a shared bus, and at least one node has no knowledge of the current status of the arbitration taking place between all nodes in the system. Such a node is called a "deaf node". Each node in the system is assigned an initial arbitration count number, for example, N+1, where N is the node number assigned to the node. The arbitration count number is the number of quiet slots a node must count before trying to transmit on the system bus. The length of a quiet slot is determined by a particular system's electrical characteristics. One quiet slot is reserved as the "deaf node quiet slot", during which a deaf node may transmit. In response to a transmission occurring in the deaf node quiet slot, each node in the system reinitializes its arbitration count number to its initial arbitration count number. Additionally, a node that is not a deaf node, but has detected a system error, may deliberately transmit during the deaf node quiet slot to reinitialize the arbitration count numbers or the internal clocks of all nodes in the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.