CMOS driver circuit having reduced switching noise
US5241221A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1992 |
| Grant date | Aug 31, 1993 |
| Priority date | — |
| Expiry date | Nov 16, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a driver circuit, high- and low-impedance drive means (26 and 28 respectively) operate in parallel to effect a desired output transition. Adaptive control means 32 respond to a threshold value of the output signal (VO) and turn off the low-impedance drive means in the course of the output transition. The low initial output impedance of the driver circuit effects rapid charging of a line capacitance CL, while toward the end of the output transition the higher output impedance of the driver circuit more closely matches the input impedance ZL of a load circuit. This higher impedance dampens ringing and thereby reduces induced supply line noise which is conventionally associated with high-speed driver circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.