Integrated memory comprising a sense amplifier
US5241504A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 10, 1992 |
| Grant date | Aug 31, 1993 |
| Priority date | — |
| Expiry date | Aug 10, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated memory includes a sense amplifier which has a parallel connection of a first and a second current branch, each current branch including channels of a control transistor and a load transistor which are coupled via a junction point, the junction points in each current branch being cross-wise coupled to the gates of the load transistors in the other current branch, and the junction points constituting outputs of the sense amplifier. The control and load transistors are of the same conductivity type, with each load transistor being connected in a source-follower configuration with its associated control transistor. As a result, the control transistors will be operative in the saturation region at all times and can be driven to full output, so that an integrated memory incorporating the invention is faster.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.