Broadband input buffered ATM switch
US5241536A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 1991 |
| Grant date | Aug 31, 1993 |
| Priority date | — |
| Expiry date | Oct 3, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Broadband ATM switches for switching ATM packetized data in timeslots are disclosed. In one embodiment, the switch includes input buffer, a space switch for connecting input ports and output ports at successive timeslots and a system scheduler. The timeslot utilization processing is carried out by using a content addressable memory. A bit map is provided for registering the timeslot utilization of the input ports and the output ports. An encoder determines the earliest commonly available timeslot for connecting input ports and their requested output ports. There is further disclosed an architecture in which groups of input ports share common buffer memories and in which the system scheduler processes grouped inputs, thus taking advantage of the architecture's similar characteristics and advantages to those of the common memory switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.