Image memory controller for controlling multiple memories and method of operation
US5241642A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1989 |
| Grant date | Aug 31, 1993 |
| Priority date | — |
| Expiry date | Sep 28, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a memory controller for controlling addresses to a plurality of different memory types while treating the memory system as a whole so as to create a unified addressing arrangement. The controller is structured to allow for a reprogramming of the split address between the memories and for maintaining contiguously addressed locations. A register is used to hold the split address and the register can be updated at initialization to vary the split depending upon physical memory changes. The controller also maintains a common bit length addressing word regardless of the memory size being addressed by the system processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.