High voltage CMOS switch with protection against diffusion to well reverse junction breakdown
US5243236A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 1991 |
| Grant date | Sep 7, 1993 |
| Priority date | — |
| Expiry date | Dec 31, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/102
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high voltage CMOS n-well switch with guarding against reverse junction breakdown, as well as gate-aided breakdown. The CMOS switch of the present invention comprises two pairs of cascoding p-channel MOSFET loads, two pairs of cascoding n-channel MOSFET drivers and an inverter for input. One device in each pair of MOSFETs is used as a guard against gate-aided breakdown. The p-channel MOSFETs have independent n-wells so that the guard devices have their n-wells independently biased without being pulled by the n-wells of the load devices. The inverter is used to provide complementary inputs to the switch. By having independent n-wells, the breakdown voltage of the switch is raised above p+/n-well reverse breakdown voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.