Molded case integrated circuit with a dynamic impedance reducing device
US5243496A · kind A · utility
9Cited by
9References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1991 |
| Grant date | Sep 7, 1993 |
| Priority date | — |
| Expiry date | Oct 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device for reducing dynamic impedances in a molded case integrated circuit comprises a chip (15) and several annular metal planes (21, 22) separated from each other by an insulating film (27, 28), each plane comprising, on its external border, legs (23, 24) coupled to the exterior of the case and, on its internal border, legs (25, 26) coupled to pads of the chip (15). The legs (23-26) are connected to the exterior and to the pads of the chip through leads (20) of a conventional connection network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.