Method of manufacturing fusible links in semiconductor devices
US5244836A · kind A · utility
91Cited by
5References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 30, 1991 |
| Grant date | Sep 14, 1993 |
| Priority date | — |
| Expiry date | Dec 30, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/131
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of forming fuse ribbons between conductive layers on a semiconductor device. The formation of these fuse ribbons may be at different levels of multiple level integrated circuits. The fuse ribbons are formed in a more precise manner than can be obtained conventionally. Resistance control can be easily achieved and significant decreases in dimensions and the use of less fuse material can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.