Memory card circuit with power-down control of access buffer
US5245582A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 17, 1991 |
| Grant date | Sep 14, 1993 |
| Priority date | — |
| Expiry date | Sep 17, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A conventional memory card circuit has a construction where an input terminal and an output terminal of storage means are directly connected with a terminal unit. In consequence, the conventional memory card circuit has a disadvantage that the stored content of the storage means might be damaged when a signal applied from the terminal unit is unstable at the time of inserting or detaching a memory card into or from the terminal unit. Therefore, according to the present invention, a buffer is provided in each of input and output terminals of storage means and the storage means is cut off from outside by the buffer at the time of inserting or detaching a memory card into or from a terminal unit, whereby the stored content of the storage means can be prevented from being damaged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.