Functional addressing method and apparatus for a multiplexed data bus
US5245705A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 9, 1990 |
| Grant date | Sep 14, 1993 |
| Priority date | — |
| Expiry date | Apr 9, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of functional addressing which may be employed with a multiplexed data bus having a plurality of data processing units coupled thereto. A function address is generated and made part of a transmitted message. Units receiving the transmitted message apply the function address to the address lines of a random access memory and read the contents of the memory at a location indicated by the function address. The contents stored at each memory location are indicative of whether or not that type of message is accepted or disregarded by the receiving unit. Also, a method of changing the contents of the memory, and hence the routing of messages between units, is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.