Method of forming recessed oxide isolation

US5246537A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Kent J. Cooper · Austin, US
• Scott S. Roth · Austin, US
• Wayne J. Ray · Austin, US
• Howard C. Kirsch · Eagle, US

Key dates

• Filing date: Apr 30, 1992
• Grant date: Sep 21, 1993
• Expiry date: Apr 30, 2012

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76227
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method requiring only a single mask results in an isolation oxide (50) which is the same size as, instead of becoming larger than, the dimension originally defined by the lithographic system. A buffer layer (14) is formed over the substrate (12). An oxidation resistant layer (16) is formed over the buffer layer (14). The oxidation resistant layer (16) is etched and a disposable sidewall spacer (30) is formed adjacent to the sidewall of the oxidation resistant layer (28), and a trench region is defined (36). The trench region (36) is etched to form a trench. The disposable sidewall spacer (30) is removed and a conformal layer (48) of oxidizable material is deposited over the trench sidewall (40) and the trench bottom surface (38). The conformal layer (48) is then oxidized to form electrical isolation in the isolation regions (26) of the substrate (12).