Method and apparatus for automatic functional speed setting of a data circuit terminating equipment
US5247546A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1991 |
| Grant date | Sep 21, 1993 |
| Priority date | — |
| Expiry date | Jun 24, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0262
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system implemented in a Data Circuit Terminating Equipment (DCE), interfacing between a user's data processing equipment and a digital network, comprises a detector for generating an Analog Carrier Detect (ACD) DCE internal signal as well as an Analog Squared Data (ASD) DCE internal signal, and an ASD WIDTH ERROR DCE internal signal from the flow of data transmitted by the network and received on the DCE receive line. The system also comprises new circuitry for generating a Lack of Receiver Timing (LRT) DCE internal signal, a Block Error ASD DCE internal signal, and a Block Error Bipolar (BEBIP) DCE internal signal. Finally, the system includes a logical decision process which leads the DCE to automatically adjust its functional speed to the rate of data transmitted by the network and received on DCE receive line. The process includes setting the DCE to the highest possible functional speed, and for that particular speed, checking all four of the ACD, LRT, BEASD and BEBIP DCE internal signals; and if one of the checkings is not satisfactory, setting the DCE to the next possible lower speed, or if all checkings are satisfactory, stopping the process as the DCE is ready to work.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.