Planar HBT-FET Device

US5250826A · kind A · utility

Assignee

• Rockwell International Corporation · US

Inventors

• Mau-Chung Frank Chang · Los Angeles, US
• Peter M. Asbeck · San Diego, US
• Richard L. Pierson, Jr. · Thousand Oaks, US

Key dates

• Filing date: Sep 23, 1992
• Grant date: Oct 5, 1993
• Expiry date: Sep 23, 2012

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/401

Abstract

A III-V compound planar HBT-FET device integrates field effect transistors (FETs) with heterojunction bipolar transistors (HBTs) formed on the same semiconductor substrate. An HBT fabricated on the substrate includes a collector, a base, and an emitter. The HBT emitter comprises a lightly doped layer of a first conductivity type deposited atop a heavily doped base layer of a second conductivity type, a lightly doped emitter cap layer of the first conductivity type deposited atop the emitter layer, and a heavily doped emitter contact layer of the first conductivity type deposited atop the emitter cap layer. A FET, isolated from the HBT by areas of ion implantation, is formed in the layers of material deposited during fabrication of the HBT. The FET has a source and a drain formed in the heavily doped emitter contact layer, a gate recess etched in the emitter contact layer between the source and drain, and a Schottky gate metal contact deposited on the lightly doped emitter cap layer exposed in the gate recess. A back gate electrode can be deposited on the base layer to form a dual-gate FET comprising a front gate MESFET and a back gate junction FET. Connecting the back gate to an ex…