MOS type semiconductor memory device

US5250832A · kind A · utility

Assignee

• NIPPON STEEL CORPORATION · JP

Inventor

• Ichiro Murai · Tateyama, JP

Key dates

• Filing date: Oct 4, 1991
• Grant date: Oct 5, 1993
• Expiry date: Oct 4, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/31

Abstract

A MOS type semiconductor memory device comprises a silicon (Si) substrate of a first conductivity type and a memory cell on a main surface of the Si substrate including a MOS transistor with a first and a second diffused layer highly doped with opposite second conductivity type impurities which provide a source and a drain region spaced apart in the main surface, a gate electrode of a conductive material formed through an insulating layer between the two highly doped diffused layers; an inter-layer insulating film formed to cover the MOS transistor; a capacitor cell formed on the inter-layer film including a lower electrode layer of conductive material formed on the inter-layer insulating film, a portion of which extends through a contact hole formed in the inter-layer insulating layer to penetrate through this layer to reach the junction adjacent to one of the highly doped diffused layers, a dielectric film on the lower electrode layer, and an upper electrode layer formed on the insulating film; and a double-diffused layer doped with the second conductivity type impurities formed to overlap with one of the two highly doped diffused layers at the junction of the Si substrate to mak…