Packaging architecture for a highly parallel multiprocessor system
US5251097A · kind A · utility
106Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1990 |
| Grant date | Oct 5, 1993 |
| Priority date | — |
| Expiry date | Jun 11, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention includes methods and apparatus for creating a packaging architecture for a highly parallel multiprocessor system. The packaging architecture of the present invention can provide for distribution of power, cooling and interconnections at all levels of components in a highly parallel multiprocessor system, while maximizing the number of circuits per unit time within certain operational constraints of such a multiprocessor system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.