Charge amplifier circuit
US5252928A · kind A · utility
11Cited by
4References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1992 |
| Grant date | Oct 12, 1993 |
| Priority date | — |
| Expiry date | Mar 19, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45138
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a charge amplifier circuit with a control loop for resetting, which for minimizing the leakage currents that falsify the measuring results includes two diodes (D.sub.1) and (D.sub.2), connected antiparallel in the loop and constituting input protection diodes of an integrated circuit (ISK). In the operating (measuring) phase the diode resistance (R.sub.D) is extremely high and the voltage drop over the diode pair is small, so that no significant leakage current gets through onto the charge amplifier input IN.sub.Q. In the reset phase the diode resistance (R.sub.Dr) is practically nil.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.