High density local interconnect in a semiconductor circuit using metal silicide
US5254874A · kind A · utility
3Cited by
20References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 8, 1991 |
| Grant date | Oct 19, 1993 |
| Priority date | — |
| Expiry date | Oct 8, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal silicide layer in or on a body of silicon wafer is used for interconnecting two or more CMOS circuit devices. In addition to a polysilicon layer and a metal layer, the metal silicide layer provides an additional layer of local interconnect which can be performed at high density to reduce the size of the die while including the same number of circuit devices. An amorphous silicon layer doped at selected regions may be used as an additional interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.