Controller for input-queued packet switch
US5255265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 1992 |
| Grant date | Oct 19, 1993 |
| Priority date | — |
| Expiry date | May 5, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5679
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Significant throughput improvement is achieved for an input queued packet switch using output port schedulers by permitting the output schedulers to recycle or reassign cell transmission times from input ports which are unable to use them. When an output scheduler assigns a cell transmission time to an input port and that input port is unable to use the assigned transmission time due to a scheduling conflict, for example, the input port makes a new request for the same output port during the next subsequent request period and then returns the unusable transmission time assignment back to the output scheduler. The output scheduler stores the returned transmission time in a separate queue for assignment to later requests for the particular output port. Throughput performance is improved from 58% (without time slot recycling) to 92% (with time slot recycling) for random packet cell traffic models.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.