Method and apparatus for skewing a memory read clock signal in a magnetic disk drive system
US5255383A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Apr 15, 1991 |
| Grant date | Oct 19, 1993 |
| Priority date | — |
| Expiry date | Apr 15, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a system for providing a skewed clock signal which is used for latching a data signal received from a memory into a read-data latch. A control signal latch and a control-signal buffer provide a control sign to the memory. A read-data buffer feeds a data signal from the memory to a read-data latch, which is provided with skewed read-clock signal. A read-clock delay circuit provides a clock signal to the read-data latch, and delays the read clock signal a period of time approximately equal to the signal propagation delay time of the read data buffer and the propagation delay time associated with transmitting a signal from the output terminal of said control signal latch circuit to the control-signal input terminal of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.