Method for producing a non-volatile memory cell using spacers

US5256584A · kind A · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventor

• Joel Hartmann · Le Pont-de-Claix, FR

Key dates

• Filing date: May 22, 1992
• Grant date: Oct 26, 1993
• Expiry date: May 22, 2012

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/111

Abstract

Method for producing a non-volatile memory cell and obtained memory cell. This method consists of embodying strips in a stacking of one nonconducting film and one conductive film, both films intended to respectively form the gate nonconductors (210) and the floating gates (208) of transistors, of forming spacers (230) on the flanks of the strips of said stacking, of eliminating the spacers on the side of the drains of the memory points to be embodied, of implanting ions of a type with conductivity differing from that of the substrate by using the remaining spacers and the strips of said stacking as a mask so as to form the sources and drains (214, 216) of the transistors, respectively offset and aligned with respect to said strips, of eliminating the remaining spacers, of forming a thin electric nonconducting film (208) on the sources and drains of the transistors, of embodying conductive strips (206a) perpendicular to the diffused source and drain zones, and of etching the strips of said stacking by using the conductive strips as a mask.