Static RAM
US5257236A · kind A · utility
14Cited by
7References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 1, 1991 |
| Grant date | Oct 26, 1993 |
| Priority date | — |
| Expiry date | Aug 1, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved static memory is described which, when used in a dual port cache memory simplifies write cycles by providing latching of decoded address signals which are used in a subsequent memory cycle for writing. Improved logic is described which allows the propagation of data at the rate .function. with timing signals of frequency 1/2.function.. An improved sense amplifier which is isolated from the column lines is the array is used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.