High-speed hybrid transmission interface
US5257289A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 11, 1991 |
| Grant date | Oct 26, 1993 |
| Priority date | — |
| Expiry date | Jul 11, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A high-speed long-line data interface is provided which employs two pre-configured parallel connectors coupled by four lines. One connector is a convert/transmit connector and the other is an unconvert/receive connector. Each connector includes a processor which buffers incoming data. The four lines include an RS-422 pair of differential transmission lines, an RS-232 status line and a ground line. Incoming parallel data is converted to serial format, then transmitted over the differential transmission lines to the unconvert/receive connector. The serial data then is unconverted back to parallel format and output to the peripheral device. Status information is sent from the peripheral to the host computer over the status line as a multi-byte pulse encoded signal. Power for the convert/transmit connector is derived parasitically from the unconvert/receive connector via the status line. Storage capacitors store charge from the status line for driving the connector during a status transmission. The convert/transmit connector self-paces its power consumption. A voltage level sensor is included for monitoring the voltage level of the parasitically-derived power signal. If the voltage goe…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.