High noise tolerance receiver
US5258661A · kind A · utility
2Cited by
10References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1992 |
| Grant date | Nov 2, 1993 |
| Priority date | — |
| Expiry date | Apr 20, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00353
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention contemplates the provision of a noise immune integrated circuit receiver in which the voltage reference to one side of an emitter-coupled current switch moves in response to the input signal, in a direction opposite the input signal. This provides the gate with a threshold hysteresis, making it immune to noise without requiring a large swing in input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.