Method of cleaning a plurality of semiconductor devices
US5259925A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1992 |
| Grant date | Nov 9, 1993 |
| Priority date | — |
| Expiry date | Jun 5, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for cleaving semiconductor devices along planes accurately positioned. Resist is applied to a major surface of the semiconductor device and a mask is projected upon the resist covered major surface. The mask is opaque in those regions in which no cleave is desired. Following the exposure of the resist, the removal of the mask and the development of the resist, an ion beam is positioned incident upon the semiconductor surface such that ion beam etching occurs in the areas in which no resist covers the semiconductor structure. Once a sufficient depth is etched in the areas not covered with resist such that the strength of the semiconductor structure in those areas is significantly less than in those areas covered by resist, the ion beam etching process is ended and the resist is stripped from the semiconductor structure. Subsequently, force is applied within the area in which the ion beam etching occurred to cleave the semiconductor structure within that region. Such cleaving may occur either prior or subsequent to etching of facets for the semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.