Multi-loop testing apparatus with field memory
US5260784A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 1992 |
| Grant date | Nov 9, 1993 |
| Priority date | — |
| Expiry date | Apr 9, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N17/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Apparatus for adjusting a digital signal which is subjected to analog processing after being reproduced from a record medium. A prerecorded digital test signal is reproduced and written to a field memory which, during a normal playback mode, is used to store the digital video signal that may be reproduced. A loop, which is opened during the normal playback mode, includes DAC and ADC for circulating the digital test signal therethrough a number of times and is coupled to the field memory to receive the stored test signal. A detector detects changes in the test signal after having been circulated through the loop, and these changes are used to establish adjustment settings for adjusting the digital video signal during a playback mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.