Method for programming a pin compatible memory device by maintaining a reset clock signal longer than a regular reset duration
US5261076A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 20, 1989 |
| Grant date | Nov 9, 1993 |
| Priority date | — |
| Expiry date | Dec 20, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable buffer chip and programming method therefor are provided in which program information is entered into the buffer chip during a time period appended to the end of an ordinary reset period and so disguised as an extension of the reset period. Program information determines the buffer status conditions to be monitored at buffer status pins, and includes first offset data and a second offset data. A non-zero value in the first offset data indicates an offset defining an almost-full condition to be monitored. A non-zero value in the second offset data indicates an offset defining an almost-empty condition to be monitored. A program indicator bit in the program information indicates whether the buffer half-full condition, or both the full and the empty condition will be monitored at a particulat buffer status pin. The buffer is programmed by first causing the buffer chip to enter a reset mode, and then entering the program information in a disguised reset period following the actual reset period. Accordingly, the buffer requires no dedicated programming pin and is made backward compatible with a nonprogrammable basic buffer chip having the same number of I/O pins. The prog…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.