Method and system for interpolating baud rate timing recovery for asynchronous start stop protocol
US5263054A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 1992 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | May 21, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/05
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus for efficient computation of a demodulation process on a digital signal processor for a sampled signal, which includes programming a digital signal processor to apply the sampled signal to an interpolating filter to add interpolation samples to the sampled signal, to search the sampled signal for a threshold crossing associated with a start bit, performing a linear interpolation to find a point where the threshold crossing occurs when a threshold crossing is detected, responsive to determining the point of the threshold crossing, determining a center of a start bit when the point of the threshold crossing has been determined, calculating a supplemental delay, and determining center points for subsequent of data bits utilizing the supplemental delay period from the center of the start bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.