Apparatus and method for reducing harmonic interference generated by a clock signal
US5263055A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 1991 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | Nov 4, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method therefor substantially reducing the interference of a harmonic frequency component (301) of a clock signal with a filtered received signal (302), comprises a frequency spreading signal generator (127) and a signal modulator (125). The frequency spreading signal generator (127) produces a frequency spreading signal (130). The signal modulator (125) modulates the clock signal, produced by a clock signal generator (129), with the frequency spreading signal (130) to produce a modulated clock signal (131) including a modulated harmonic frequency component (303). The power level of a modulated harmonic frequency component (303), corresponding to the harmonic frequency component interfering with the filtered signal (202-204), is spread over a frequency bandwidth (f.sub.6 -f.sub.7) greater than the predetermined frequency bandwidth (f.sub.4 -f.sub.5) causing the power level of the modulated harmonic frequency component (303) within the predetermined frequency bandwidth (f.sub.4 -f.sub.5) to decrease.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.