Circuit and method for evaluating fuzzy logic rules
US5263125A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1992 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | Jun 17, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S706/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit (14) to evaluate a plurality of fuzzy logic rules in a data processor (10) in response to a single "REV" software instruction. The REV instruction evaluates the rules stored in a memory (32) to determine a rule strength of each. Antecedents are separated from consequences of each of the rules by a buffer address. To evaluate the antecedents, an ALU (52) subtracts an antecedent in memory (32) from a current antecedent stored in an accumulator (58). Subsequently, a swap logic (46) provides control information to assign a minimum value as a rule strength of the rule. Similarly, a maximum rule strength is required during evaluation of the consequences. ALU (52) subtracts a consequence in memory (32) from a consequence stored in accumulator (58). Depending on a result, swap logic (46) provides control information to assign a maximum rule strength to the consequences of the evaluated rule.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.