Resonant loop resistive FET mixer
US5263198A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1991 |
| Grant date | Nov 16, 1993 |
| Priority date | — |
| Expiry date | Nov 5, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/009
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer includes a local oscillator (LO) matching network having an LO input port, an RF matching network also having an input port and an IF filter which provides an IF output from the mixer. A FET having a gate, drain and source operates at the center of the mixer. A resonant loop is connected between the drain and gate of the FET. The gate of the FET is connected to an output of the LO matching network. The drain of the FET is connected to an output of the RF matching network. The source of the FET is connected to an input of the IF filter. The resonant loop may incorporate a DC blocking capacitor which does not function as part of the resonant loop, but which serves to block DC allowing the drain and gate of the FET to be biased independently.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.