Method of manufacturing a thin film transistor
US5264383A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 23, 1992 |
| Grant date | Nov 23, 1993 |
| Priority date | — |
| Expiry date | Jun 23, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/949
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Source (51) and drain (52) of a thin-film transistor (TFT) are formed from a conductive layer (5) using a photolithographic step (FIG. 3) in which the gate (4) serves as a photomask. In accordance with the invention the insulated gate structure (3,4) is formed at the upper face of the channel-forming semiconductor film (2), i.e. remote from the transparent substrate (1). The semiconductor film (2) may be annealed to high-mobility polycrystalline material before depositing the gate structure (3,4) and the overlying conductive layer (5). In this way, high speed TFTs can be formed due to a combination of low gate-to-drain and gate-to-source capacitances and the provision of the transistor channel in the high quality semiconductor material adjacent to the upper face of the film (2). Preferably ultra-violet radiation (20: FIG. 1) is used for the annealing with an absorption depth less than the thickness of the film (2) so that the film-substrate interface is not heated which otherwise may weaken the adhesion of the film (2) to the substrate (1). By using an angled exposure in a photolithographic and etching step with the gate (4) as a shadow photomask, a low-doped drain part can be defi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.