Technique for improving the resolution of an A/D converter
US5265039A · kind A · utility
14Cited by
10References
47Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1991 |
| Grant date | Nov 23, 1993 |
| Priority date | — |
| Expiry date | Jun 18, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/201
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A technique for improving the resolution of an A/D converter (30). The input analog signal is sampled to generate an analog level and the analog level is held (20) for an interval. A dither signal (22) is superimposed (23) on the held level to generate a fluctuating voltage. This fluctuating voltage is then sampled (25) a plurality of at least N times, and N sampled values are communicated to the A/D converter (30) so that N digitized values are generated. These digitized values are averaged (32) to provide an output having a digitization error reduced by a factor of up to N.sup.1/2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.