Method and apparatus for substituting spare memory chip for malfunctioning memory chip with scrubbing
US5267242A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1991 |
| Grant date | Nov 30, 1993 |
| Priority date | — |
| Expiry date | Sep 5, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer memory maintainence apparatus tests operating system storage and identifies a malfunctioning memory chip in an on-line memory array by detecting and recording all permanent data errors using data comparison along with data complementation and substitutes a spare memory chip for the malfunctioning one for all memory read commands. All write commands are performed on both spare memory and the malfunctioning memory chip. All contents of defective chip are copied to the spare chip. The computer system maintains the scrubbing and a recording counter for each of the data bits in an ECC memory data word. The sparing logic in the memory storage system maintains the bit steering logic and controls for the spare chip. When a counter is incremented above a threshold sparing is invoked to replace the failing bit position. The system writes to the defective and spare chips in parallel even after bit steering is invoked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.