Device and method for asynchronous cyclic redundancy checking for digital receivers
US5267249A · kind A · utility
29Cited by
9References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 9, 1991 |
| Grant date | Nov 30, 1993 |
| Priority date | — |
| Expiry date | May 9, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/33
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device and method for asynchronous cyclic redundancy checking (CRC) for digital receivers includes utilizing a finite impulse response (FIR) filter, and comparing and gating circuits. The FIR filter may contain a first multiple delay system unit (102) and a first logic gating system (104). The comparing and gating circuit may contain a second multiple delay system unit (106), and a second logic gating system (110). The device and method is implementable, where desired, utilizing a computer program. The invention provides a faster determination of a CRC frame synchronization on a received digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.