Method of forming a self-aligned bipolar transistor
US5268314A · kind A · utility
7Cited by
8References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 3, 1992 |
| Grant date | Dec 7, 1993 |
| Priority date | — |
| Expiry date | Feb 3, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bipolar transistor device having reduced collector-base capacitance and advantageous extrinsic base resistance properties is fabricated by a self-aligned process. Successively formed first and second self-aligned masking spacers are utilized to define the collector-base junction area and to permit the conductivity of base link and base contact portions of the extrinsic base to be independently established.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.