Semiconductor integrated circuit capable of compensating errors in manufacturing process
US5268872A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1991 |
| Grant date | Dec 7, 1993 |
| Priority date | — |
| Expiry date | Sep 27, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/023
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The gate of a first P-channel transistor of a first comparator is supplied with an input signal, and the gate of a second P-channel transistor of the first comparator is supplied with a reference voltage. An output terminal of the first comparator is connected to an output circuit and the gates of first and second P-channel transistors of a second comparator are supplied with the reference voltage. The second comparator outputs a voltage equal to a stand-by time output voltage of the first comparator and the output voltage from the second comparator is supplied to the non-inversion input terminal of a third comparator which is connected to a voltage generating circuit. The voltage generating circuit has substantially the same dimension ratio as the output circuit and generates a voltage equal to the threshold voltage of the output circuit. A third comparator controls the first P-channel transistors of the first and second comparators in accordance with a difference voltage between the output voltage of the second comparator and the output voltage of the voltage generating circuit to thereby automatically set a stand-by time output voltage of the first comparator at a value close to…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.