Clock supply circuit layout in a circuit area
US5270592A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 1992 |
| Grant date | Dec 14, 1993 |
| Priority date | — |
| Expiry date | Aug 21, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock supply circuit having a circuit area includes an input terminal for receiving a clock pulse and a buffer having an input electrically connected to the input terminal and an output. The buffer is disposed in the center of the circuit area. The clock supply circuit also includes a main conductive pattern electrically connected to the output of the buffer. The main conductive pattern is disposed through the center of the circuit area. Each of the branch conductive patterns is electrically connected to the main conductive pattern and extends from the main conductive pattern. Also, each of the branch conductive patterns has a width smaller than the width of the main conductive pattern. Each of the clock receiving circuits is electrically connected to one of the branch conductive patterns and disposed in the circuit area. The number of the clock receiving circuits electrically connected to one branch conductive pattern is same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.