Impedance matching and bias feed network
US5270667A · kind A · utility
18Cited by
6References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1992 |
| Grant date | Dec 14, 1993 |
| Priority date | — |
| Expiry date | Mar 31, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An impedance matching and bias feed network for interfacing to a low noise amplifier of a receiver section of an electrically steered phased array antenna. The impedance matching and bias feed network includes an inductor and capacitor network for impedance transformation while providing in shunt with a 50 ohm input side of the network a gate bias path via the inductor to the low noise amplifier thereby substantially reducing the receiver noise figure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.